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ASAHI KASEI
[AK6416C]
AK6416C
16Kbit Serial CMOS EEPROM
Features
ADVANCED CMOS EEPROM TECHNOLOGY READ/WRITE NON-VOLATILE MEMORY - Wide VCC (1.8V to 5.5V) operation - 16384 bits: 1024 x 16 organization ONE CHIP MICROCOMPUTER INTERFACE - Interface with one chip microcomputer's serial communication port directly LOW POWER CONSUMPTION - 0.8A Max. (Standby mode) HIGH RELIABILITY - Endurance - Data Retention : 1000K cycles/Address : 10 years
SPECIAL FEATURES - 8 word Page Write Mode - High speed operation ( fMAX=5MHz: VCC=4.5V to 5.5V ) - Automatic write cycle time-out with auto-ERASE(5ms Max.) - Automatic address increment (READ) - Ready/ Busy status signal - Software and Hardware controlled write protection IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package (SSOP, MSOP)
DO
DATA REGISTER 16 16
DI
INSTRUCTION REGISTER
R/W AMPS AND AUTO ERASE
INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION
EEPROM
16384bit 1024 x16
ADD BUFFERS
DECODER
CS
VPP SW
SK
RESET
VREF
VPP GENERATOR
RDY/BUSY
Block diagram
DAS05E-00 -12005/03
ASAHI KASEI
[AK6416C]
General Description
The AK6416C is a 16384bit, serial, read/write, non-volatile memory device fabricated using an advanced CMOS EEPROM technology. The AK6416C has 16384bits of memory organized into 1024 registers of 16 bits each. The AK6416C can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. The AK6416C can connect to the serial communication port of popular one chip microcomputer directly (3 line negative clock synchronous interface). At write operation, AK6416C takes in the write data from data input pin (DI) to a register synchronously with rising edge of input pulse of serial clock pin ( SK ). And at read operation, AK6416C takes out the read data from a register to data output pin (DO) synchronously with falling edge of SK . The AK6416C has 5 instructions such as READ, WRITE, PAGE WRITE, WREN (write enable) and WRDS (write disable). Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits x 2). When input level of SK pin is high level and input level of chip select ( CS ) pin is changed from high level to low level, AK6416C can receive the instructions. Special features of the AK6416C include : automatic write time-out with auto-ERASE, Ready/ Busy status signal output and ultra-low standby power mode when deselected ( CS =high). Software and Hardware controlled write protection The AK6416C has 2 (hardware and software) write protection functions. After power on or after execution of WRDS (write disable) instruction, execution of WRITE instruction will be disabled. This write protection condition continues until WREN instruction is executed or VCC is removed from the part. Execution of READ instruction is independent of both WREN and WRDS instructions. Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the WRITE instruction is not executed. Ready/ Busy status signal During the automatic write time-out period ( Busy status), the AK6416C can't accept the other instructions. The AK6416C has 2 functions to know the Busy status from exterior. The RDY/ BUSY pin indicates the Busy status regardless of the CS pin status. The RDY/ BUSY pin outputs the low level regardless of the CS pin status during Busy status. Except the above status, this pin outputs high level. Also the DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is changed from high level to low level, the AK6416C is in the status output mode and the DO pin indicates the Ready/ Busy status. The Ready/ Busy status outputs on DO pin until CS pin is changed from low level to high level, or first bit ("1") of op-code of next instruction is given to the part. Except when the device is in the status output mode or outputs data, the DO pin is in the high impedance state.
Type of Products
Model AK6416CM AK6416CH Temp.Range -40C to 85C -40C to 85C VCC 1.8V to 5.5V 1.8V to 5.5V Package 8pin Plastic SSOP 8pin Plastic MSOP
DAS05E-00 -2-
2005/03
ASAHI KASEI
[AK6416C]
Pin Arrangement
AK6416CM
CS SK DI DO 1 2 3 4 8pin SSOP 8 7 6 5 VCC RDY/BUSY RESET GND CS SK DI DO
AK6416CH
1 2 3 4 8 7 6 5 VCC RDY/BUSY RESET GND
8pin MSOP
Pin Function
Pin name CS SK DI DO RESET RDY/BUSY VCC GND Functions Chip Select input Serial Clock input Serial Data input Serial Data output RESET input RDY/BUSY output Power Supply Ground
DAS05E-00 -3-
2005/03
ASAHI KASEI
[AK6416C]
Pin Description CS (Chip Select)
When SK is high level and CS is changed from high level to low level, AK6416C can receive the instructions. CS should be kept low level while receiving op-code, address and data and while outputting data. If CS is changed to high level during the above period, AK6416C stops the instruction execution. When SK is low and CS is changed from high level to low level, AK6416C will be in status output mode. The CS need not be low level during the automatic write time-out period ( Busy status).
SK (Serial Clock) The SK clock pin is the synchronous clock input for input/output data. At write operation, AK6416C takes in the write data from data input pin (DI) synchronously with rising edge of input pulse of serial clock pin ( SK ). And at read operation, AK6416C takes out the read data to data output pin (DO) synchronously with falling edge of SK . The SK clock is not needed during the automatic write time-out period ( Busy status), the status output period and when the device isn't selected ( CS = high level). DI (Data Input)
The op-code, address and write data is input to the DI pin.
DO (Data Output)
The DO pin outputs the read data and status signal and will be high impedance except for this timing.
RDY/ BUSY (Ready/ Busy status)
This pin outputs the internal programming status. When the AK6416C is in the automatic write time-out period, this pin outputs the low level ( Busy status), and outputs the high level except for this timing.
RESET (Reset)
The AK6416C stops executing the write instruction when the RESET pin is high level. The RESET pin should be low level while the write instruction input period and the page write instruction input period and the automatic write time-out period. If the RESET pin is high level while the automatic write time-out period, the AK6416C stops execution of internal programming and the device returns to ready status. In this case the word data of the specified address will be incomplete. When inputting the new instruction after RESET, the CS pin should be set to high level. The read, write enable and write disable instructions are not affected by RESET pin status.
VCC (Power Supply) GND (Ground)
DAS05E-00 -4-
2005/03
ASAHI KASEI
[AK6416C]
Functional Description
The AK6416C has 5 instructions such as READ, WRITE, Page Write, WREN (write enable) and WRDS (write disable). Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits x 2). When input level of SK pin is high level and input level of chip select ( CS ) pin is changed from high level to low level, AK6416C can receive the instructions. When the instructions are executed consecutively, the CS pin should be brought to high level for a minimum of 250ns(Tcs) between consecutive instruction cycle.
Instruction Set For AK6416C
Instruction WRITE Page Write READ WREN WRDS (WRAL) Op-Code 1 0 1 0 0 1 A9 A8 1 0 1 1 0 1 A9 A8 1 0 1 0 1 0 A9 A8 10100011 10100000 10101111 Address A7 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0 XXXXXXXX XXXXXXXX XXXXXXXX D15 - D0 X: don't care User can't use this Data D15 - D0 D15 - D0 D15 - D0
(Note) The WRAL instruction is used for factory function test only. instruction.
Write
The write instruction is followed by 16 bits of data to be written into the specified address. After the 32nd rising edge of SK to read D0 in, the AK6416C will be put into the automatic write time-out period. During the automatic write time-out period ( Busy status) and while entering write instruction, the RESET pin should be low level. If the RESET pin is set to high level during the automatic write time-out period, the AK6416C stops execution of internal programming and the device returns to ready status. In this case the word data of the specified address will be incomplete. When inputting the new instruction after RESET, the CS pin should be set to high level. When the RESET pin is kept at high level, the write is not executed. This becomes write protection function. The CS pin need not be high level during automatic write time-out period ( Busy status).
RESET CS SK DI DO RDY/ BUSY
1 2 3 4 5 6 7 8 9 10 15 16 17 18 30 31 32
1
0
1
0
0
1
A9
A8
Hi-Z
A7
A6
A1
A0 D15 D14
D2 D1 D0 tE/W
WRITE
DAS05E-00 -52005/03
ASAHI KASEI
[AK6416C]
Page Write AK6416C has Page Write mode, which can write the data within 8 words with one programming cycle. The input data sent to the shift register within 8 words. After the instruction input, the internal programming cycle starts when CS pin changes low to high. After the instructions are inputted, CS pin should change low to high after the last data bit (D0) inputs and before next SCK clock rises. Page Write function can start only at this timing. After the receipt of each word, the three lower order address pointer bits internally incremented by one. The higher order seven bits of the word address remains constant. When the highest address is reached "XX XXXX X111", the address counter rolls over to address "XX XXXX X000" allowing the page write cycle to be continued indefinitely. If AK6416C is transmitted more than 8 words, the address counter will "roll over" and the previously written data will be overwritten. When AK6416C is transmitted 10 words, ninth word will be overwritten to first word, and tenth word will be overwritten to second word. During the automatic write time-out period ( Busy status) and while entering Page Write instruction, the RESET pin should be low level. If the RESET pin is set to high level during the automatic write time-out period, the AK6416C stops execution of internal programming and the device returns to ready status. In this case the word data of the specified address will be incomplete. When inputting the new instruction after RESET, the CS pin should be set to high level. When the RESET pin is kept at high level, the Page Write is not executed. This becomes write protection function. The CS pin need not be high level during automatic write time-out period ( Busy status).
RESET CS SK
1 2 3 4 5 6 7 8 9 10 15 16 17 18 30 31 32
Data(n) DI DO RDY/ BUSY 1 0 1 1 0 1 A9 A8
Hi-Z
A7
A6
A1
A0
D15 D14
D2
D1
D0
RESET CS SK
33 34 46 47 48
Data(n+1) DI DO RDY/ BUSY D15 D14 D2 D1 D0 D15
Hi-Z
Data(n+7) D0 D15 D14 D2 D1 D0
tE/W
PAGE WRITE
DAS05E-00 -6-
2005/03
ASAHI KASEI
[AK6416C]
Read The read instruction is the only instruction which outputs serial data on the DO pin. When the 17th falling edge of SK is received , the DO pin will come out of high impedance state and shift out the data from D15 first in descending order which is located at the address specified in the instruction. The data in the next address can be read sequentially by continuing to provide clock. The address automatically cycles to the next higher address after the 16bit data shifted out. When the highest address is reached (A9-A0 : 11 1111 1111), the address counter rolls over to address (A9-A0 : 00 0000 0000) allowing the read cycle to be continued indefinitely.
CS SK DI DO RDY/ BUSY * The data in the next address can be read sequentially by continuing to provide clock.
1 2 3 4 5 6 7 8 9 10 15 16 17 18 32 33 34 48
1
0
1
0
1
0
A9
A8
Hi-Z
A7
A6
A1
A0 D15 D14 D0 D15 D14 * D0 "H"
READ
WREN / WRDS ( Write Enable and Write Disable )
When VCC is applied to the part, it powers up in the programming disable (WRDS) state. Programming must be preceded by a programming enable (WREN) instruction. Programming remains enabled until a programming disable (WRDS) instruction is executed or VCC is removed from the part. The programming disable instruction is provided to protect against accidental data disturb. Execution of a read instruction is not affected by both WREN and WRDS instructions.
CS SK DI DO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
1
0
1
0
0
0 WREN=11 WRDS=00
X
X
Hi-Z
X
X
X
X
X
X
SK pulses exceeding 17 are ignored.
WREN / WRDS
DAS05E-00 -7-
2005/03
ASAHI KASEI
[AK6416C]
Absolute Maximum Ratings
Parameter Power Supply All Input Voltages with Respect to Ground Ambient storage temperature Symbol VCC VIO Tst Min. -0.6 -0.6 -65 Max. +6.5 VCC+0.6 +150 Unit V V C
Stress above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability.
Recommended Operating Condition
Parameter Power Supply Ambient Operating Temperature Symbol VCC Ta Min. 1.8 -40 Max. 5.5 +85 Unit V C
DAS05E-00 -8-
2005/03
ASAHI KASEI
[AK6416C]
Electrical Characteristics
(1) D.C. ELECTRICAL CHARACTERISTICS ( 1.8V VCC 5.5V, -40C Parameter Current Dissipation (WRITE) Current Dissipation (READ,WREN, WRDS) Current Dissipation (Standby) Input High Voltage Input Low Voltage Output High Voltage Symbol ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 ICCS VIH1 VIH2 VIL1 VIL2 VOH1 VOH2 Output Low Voltage VOL1 VOL2 Input Leakage CS , SK ,DI,RESET Output Leakage ILI ILO Condition VCC=5.5V,tSKP=200ns VCC=2.5V,tSKP=400ns VCC=1.8V,tSKP=1.0s VCC=5.5V,tSKP=200ns VCC=2.5V,tSKP=400ns VCC=1.8V,tSKP=1.0s VCC=5.5V *1 *1 *1 *1 *1 *1 *2 0.7xVCC 0.8xVCC 0 0 VCC-0.3 VCC-0.3 0.4 0.4 1.0 1.0
Ta 85C, unless otherwise specified )
Min. Max. 2.5 2.0 1.5 1.0 0.2 0.1 0.8 VCC+0.5 VCC+0.5 0.3xVCC 0.2xVCC Unit mA mA mA mA mA mA A V V V V V V V V A A
5.5V 1.8V VCC < 2.5V 2.5V VCC 5.5V 1.8V VCC < 2.5V 2.5V VCC 5.5V
IOH=-50A 1.8V VCC IOH=-50A 2.5V VCC IOL=1.0mA 1.8V VCC IOL=0.1mA
2.5V VCC
< 2.5V 5.5V < 2.5V
VCC=5.5V, VIN=5.5V VCC=5.5V VOUT=5.5V, CS=VCC
*1 : VIN=VIH/VIL, DO=RDY/ BUSY =Open *2 : CS =VCC, SK /DI/RESET=VCC/GND, DO= RDY/ BUSY =Open
DAS05E-00 -9-
2005/03
ASAHI KASEI
[AK6416C]
(2) A.C. ELECTRICAL CHARACTERISTICS ( 1.8V VCC 5.5V, -40C Parameter SK Cycle Time Symbol tSKP1 tSKP2 tSKP3 SK Pulse Width tSKW1 tSKW2 tSKW3 CS Setup Time CS Hold Time SK Setup Time RESET Setup Time RESET Hold Time Data Setup Time tCSS1 tCSS2 tCSH1 tCSH2
tSKSH/L1 tSKSH/L2
Ta 85C, unless otherwise specified )
Min. 200 400 1.0 100 200 500 40 80 40 80 40 80 0 0 Max. Unit ns ns s ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 60 150 300 1 5 100 250 500 ns ns ns s ms ns ns ns E/W cycles / Address
VCC 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC 5.5V 1.8V VCC < 4.5V 4.5V VCC 5.5V 1.8V VCC < 4.5V 4.5V VCC 5.5V 1.8V VCC < 4.5V
4.5V
Condition
tRESS tRESH tDIS1 tDIS2 tDIS3
Data Hold Time
tDIH1 tDIH2 tDIH3
DO pin Output delay
tPD1 tPD2 tPD3 tPD tE/W tRC tCS tOZ *4
VCC 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V
4.5V CL=100pF
40 80 200 40 80 200 *3 *3 *3
RDY/BUSY pin Output delay Selftimed Programming Time Write Recovery Time Min CS High Time DO High-Z Time Endurance
5.5V, 25C, Page Write
1,000,000
*3 : CL=100pF *4 : These parameters are not 100% tested.
These are the sample value.
DAS05E-00 - 10 -
2005/03
ASAHI KASEI
[AK6416C]
Synchronous Data Timing
tRESS
RESET
tCS tCSS tSKP tSKSH tSKW tSKW
CS SK DI DO
tRC
1
2
tDIS tDIH
3
1
0
1
Hi-Z
RDY/ BUSY
Instruction Input
CS SK DI DO RDY/ BUSY
"H" tSKP "L" tSKW tSKW
15
tDIS tDIH
16
17
18
A1
A0
tPD Hi-Z tPD
D15
D14
"H" "L"
Data Output (READ)
DAS05E-00 - 11 -
2005/03
ASAHI KASEI
[AK6416C]
CS SK DI
tOZ
31
32
DO RDY/ BUSY
"H" "L"
D1
D0
Data Output (READ)
tRESH
RESET CS
tCSH
SK DI DO RDY/ BUSY
30
31
32
D2
D1
D0
Hi-Z tPD tE/W
WRITE Ready / Busy Signal Output (RDY/ BUSY pin)
DAS05E-00 - 12 -
2005/03
ASAHI KASEI
[AK6416C]
tRESH
RESET CS
tCSH tSKH
SK DI DO RDY/ BUSY
PAGE WRITE Ready / Busy Signal Output (RDY/ BUSY pin)
D1 D0
Hi-Z tPD tE/W
tCS
CS
tSKSL
SK DI
tPD tOZ
DO RDY/ BUSY
BUSY
READY
BUSY
READY
Ready/ Busy Signal Output (DO pin)
DAS05E-00 - 13 -
2005/03
IMPORTANT NOTICE
These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support and maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that part in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and reliability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.

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